Naslov
Memory-aware multiobjective design space exploration of heteregeneous MPSoC

Autori
Frid, N. ; Sruk, V.

Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni

Izvornik
2018 41st International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO) / Skala, Karolj - Rijeka : Institute of Electrical and Electronics Engineers (IEEE), 2018, 861-866

ISBN
978-953-233-097-7

Skup
41st International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO 2018)

Mjesto i datum
Opatija, Hrvatska, 22.05.2018. - 25.05.2018

Vrsta sudjelovanja
Predavanje

Vrsta recenzije
Međunarodna recenzija

Ključne riječi
genetic algorithms ; integrated circuit design ; microprocessor chips ; random-access storage ; system-on-chip ; communication channel ; memory-aware multiobjective design space exploration ; NSGA-II evolutionary algorithm ; heterogeneous MPSoC design ; Task analysis ; Program processors ; Resource management ; Communication channels ; Space exploration ; Processor scheduling ; Evolutionary computation ; design space exploration ; MPSoC ; evolutionary algorithm

Sažetak
This paper discusses multiobjective exploration of heterogeneous MPSoC design space using a method based on NSGA-II evolutionary algorithm. Key feature of the proposed method is separation of computation and communication which enables exploration of mapping computation to processors and communication to memory elements. In this paper two approaches to mapping and scheduling are presented and compared: (1) single-phased, where tasks and communication channels are mapped to processor and memories simultaneously, and (2) two-phased, where mapping of tasks to processors is done in first phase, followed by mapping of communication channel to memories in the second phase.

Izvorni jezik
Engleski

Znanstvena područja
Računarstvo

POVEZANOST RADA