Pregled bibliografske jedinice broj: 910236
The receiver circuit for ultra-wideband integral pulse frequency modulated wireless sensor
The receiver circuit for ultra-wideband integral pulse frequency modulated wireless sensor // Modern Circuits and Systems Technologies (MOCAST), 2016 5th International Conference on / Nikolaidis, Spiros (ur.).
Solun: Institute of Electrical and Electronics Engineers (IEEE), 2016. str. 1-4 doi:10.1109/MOCAST.2016.7495136 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)
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Naslov
The receiver circuit for ultra-wideband integral pulse frequency modulated wireless sensor
Autori
Matić, Tomislav ; Herceg, Marijan ; Job, Josip ; Šneler, Leon
Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni
Izvornik
Modern Circuits and Systems Technologies (MOCAST), 2016 5th International Conference on
/ Nikolaidis, Spiros - Solun : Institute of Electrical and Electronics Engineers (IEEE), 2016, 1-4
ISBN
978-1-4673-9680-6
Skup
Modern Circuits and Systems Technologies (MOCAST) 2016
Mjesto i datum
Solun, Grčka, 12.05.2016. - 14.05.2016
Vrsta sudjelovanja
Predavanje
Vrsta recenzije
Međunarodna recenzija
Ključne riječi
Ultra-Wideband ; Pulse Frequency Modulation ; wireless transmission ; FPGA
Sažetak
The paper presents the novel receiver architecture for the short-range wireless sensor communication, based on Integral Pulse Frequency Modulator (IPFM) and Ultra-Wideband (UWB) pulse generator. UWB IPFM wireless sensor transmits ultra-wideband pulse pairs with information contained in the distance between consecutive pulse pairs. Multi-user coding is performed using delay elements, where each user has unique delay time. At the receiver input Low Noise Amplifier (LNA) amplifies UWB pulses and detect each pulse. Since the narrow pulses cannot be processed with digital signal processor, class C amplifier with integrated pulse stretcher is used at the output of the LNA. The amplified and stretched pulses are fed to the comparator which is followed by FPGA for digital signal processing and demodulation. The paper presents the architecture of the receiver that is implemented in discrete type laboratory prototype. Measurement results of the signals at each stage are presented for IPFM-based transmitter.
Izvorni jezik
Engleski
POVEZANOST RADA
Projekti:
HRZZ-UIP-2014-09-6219 - Energetski učinkovit asinkroni bežični prijenos (EEAWT) (Matić, Tomislav, HRZZ - 2014-09) ( CroRIS)