Naslov
An 11-uW, 9-bit fully differential, cyclic/algorithmic ADC in 0.13 μm CMOS

Autori
Bako, Niko ; Fricke, Kyle ; Sobot, Robert ; Barić, Adrijan

Izvornik
International journal of circuit theory and applications (0098-9886) 45 (2017), 8; 1095-1114

Vrsta, podvrsta i kategorija rada
Radovi u časopisima, članak, znanstveni

Ključne riječi
cyclic/algorithmic analogue-to-digital converter (ADC) ; fully-differential ; low-power ; sup-ply voltage variations ; slew-rate

Sažetak
This paper describes a fully differential, cyclic, analogue-to-digital converter (ADC). It utilizes a 4-bit binary weighted capacitor array to obtain 9-bit resolution. The ADC uses an operational amplier to suppress supply voltage variations. The operational amplier with the slew-rate detection is used to increase the speed of the ADC. The ADC is fabricated in IBM 0.13 μm CMOS process and occupies 650 × 850 μm2 active area. At 10 kS/s sampling rate, the ADC consumes 11 μW. In order to test immunity of the ADC on the supply voltage variations, static and dynamic performance of the ADC is measured with triangular supply voltage (VDC= 1.5V, VAC= 200 mVpp, f = 1 kHz). The measured peak of differential nonlinearity and integral nonlinearity is +0.26∕−0.67 and +0.65∕−0.59, respectively. At 250 Hz, effective number of bit is 8.4 bits, SFDR = 66.7 dB and SNDR = 52.6 dB.

Izvorni jezik
Engleski

Znanstvena područja
Elektrotehnika

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