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Pregled bibliografske jedinice broj: 633627

Embedded system environment: A framework for TLM- based design and prototyping

Abdi, Samar; Yonghyun Hwang; Lochi Yu; Hansu Cho; Viskic, Ines; Gajski, Daniel D.
Embedded system environment: A framework for TLM- based design and prototyping // Proceedings of 21st IEEE International Symposium on Rapid System Prototyping (RSP), 2010
Fairfax (VA), Sjedinjene Američke Države: Institute of Electrical and Electronics Engineers (IEEE), 2010. str. 1-7 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)

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Naslov
Embedded system environment: A framework for TLM- based design and prototyping

Autori
Abdi, Samar ; Yonghyun Hwang ; Lochi Yu ; Hansu Cho ; Viskic, Ines ; Gajski, Daniel D.

Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni

Izvornik
Proceedings of 21st IEEE International Symposium on Rapid System Prototyping (RSP), 2010 / - : Institute of Electrical and Electronics Engineers (IEEE), 2010, 1-7

ISBN
978-1-4244-7073-0

Skup
21st IEEE International Symposium on Rapid System Prototyping (RSP)

Mjesto i datum
Fairfax (VA), Sjedinjene Američke Države, 08.06.2010. - 11.06.2010

Vrsta sudjelovanja
Predavanje

Vrsta recenzije
Međunarodna recenzija

Ključne riječi
C++ language; embedded systems; field programmable gate arrays; logic design; performance evaluation; software prototyping; C-C++ code; ESE back-end; ESE front-end; FPGA project files; RTL interfaces; SW development; Xilinx EDK; cycle accurate model; early timing estimation; embedded system design; graphical capture; logic synthesis tools; model-based design methodology; multiprocessor embedded systems; prototype; system performance; transaction level models; virtual platforms

Sažetak
This paper presents Embedded System Environment (ESE), which is a comprehensive set of tools for supporting a model-based design methodology for multi-processor embedded systems. It consists of two parts: ESE Front-End and ESE BackEnd. ESE Front-End provides automatic generation of SystemC transaction level models (TLMs) from graphical capture of system platform and application C/C++ code. ESE generated TLMs can be used either as virtual platforms for SW development or for fast and early timing estimation of system performance. ESE Back-End provides automatic synthesis from TLM to Cycle Accurate Model (CAM) consisting of RTL interfaces, system SW and prototype ready FPGA project files. ESE generated RTL can be synthesized using standard logic synthesis tools and system SW can be compiled along with application code for target processors. ESE automatically creates Xilinx EDK projects for board prototyping. Our experimental results demonstrate that ESE can drastically reduce embedded system design and prototyping time, while maintaining design quality similar to manual design.

Izvorni jezik
Engleski

Znanstvena područja
Računarstvo



POVEZANOST RADA

Projekti:
036-0362980-1929 - Oblikovanje okolina za ugradene sustave (Sruk, Vlado, MZO ) ( CroRIS)

Ustanove:
Fakultet elektrotehnike i računarstva, Zagreb

Profili:

Avatar Url Daniel Gajski (autor)

Poveznice na cjeloviti tekst rada:

Pristup cjelovitom tekstu rada

Citiraj ovu publikaciju:

Abdi, Samar; Yonghyun Hwang; Lochi Yu; Hansu Cho; Viskic, Ines; Gajski, Daniel D.
Embedded system environment: A framework for TLM- based design and prototyping // Proceedings of 21st IEEE International Symposium on Rapid System Prototyping (RSP), 2010
Fairfax (VA), Sjedinjene Američke Države: Institute of Electrical and Electronics Engineers (IEEE), 2010. str. 1-7 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)
Abdi, S., Yonghyun Hwang, Lochi Yu, Hansu Cho, Viskic, I. & Gajski, D. (2010) Embedded system environment: A framework for TLM- based design and prototyping. U: Proceedings of 21st IEEE International Symposium on Rapid System Prototyping (RSP), 2010.
@article{article, author = {Abdi, Samar and Viskic, Ines and Gajski, Daniel D.}, year = {2010}, pages = {1-7}, keywords = {C++ language, embedded systems, field programmable gate arrays, logic design, performance evaluation, software prototyping, C-C++ code, ESE back-end, ESE front-end, FPGA project files, RTL interfaces, SW development, Xilinx EDK, cycle accurate model, early timing estimation, embedded system design, graphical capture, logic synthesis tools, model-based design methodology, multiprocessor embedded systems, prototype, system performance, transaction level models, virtual platforms}, isbn = {978-1-4244-7073-0}, title = {Embedded system environment: A framework for TLM- based design and prototyping}, keyword = {C++ language, embedded systems, field programmable gate arrays, logic design, performance evaluation, software prototyping, C-C++ code, ESE back-end, ESE front-end, FPGA project files, RTL interfaces, SW development, Xilinx EDK, cycle accurate model, early timing estimation, embedded system design, graphical capture, logic synthesis tools, model-based design methodology, multiprocessor embedded systems, prototype, system performance, transaction level models, virtual platforms}, publisher = {Institute of Electrical and Electronics Engineers (IEEE)}, publisherplace = {Fairfax (VA), Sjedinjene Ameri\v{c}ke Dr\v{z}ave} }
@article{article, author = {Abdi, Samar and Viskic, Ines and Gajski, Daniel D.}, year = {2010}, pages = {1-7}, keywords = {C++ language, embedded systems, field programmable gate arrays, logic design, performance evaluation, software prototyping, C-C++ code, ESE back-end, ESE front-end, FPGA project files, RTL interfaces, SW development, Xilinx EDK, cycle accurate model, early timing estimation, embedded system design, graphical capture, logic synthesis tools, model-based design methodology, multiprocessor embedded systems, prototype, system performance, transaction level models, virtual platforms}, isbn = {978-1-4244-7073-0}, title = {Embedded system environment: A framework for TLM- based design and prototyping}, keyword = {C++ language, embedded systems, field programmable gate arrays, logic design, performance evaluation, software prototyping, C-C++ code, ESE back-end, ESE front-end, FPGA project files, RTL interfaces, SW development, Xilinx EDK, cycle accurate model, early timing estimation, embedded system design, graphical capture, logic synthesis tools, model-based design methodology, multiprocessor embedded systems, prototype, system performance, transaction level models, virtual platforms}, publisher = {Institute of Electrical and Electronics Engineers (IEEE)}, publisherplace = {Fairfax (VA), Sjedinjene Ameri\v{c}ke Dr\v{z}ave} }

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