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Pregled bibliografske jedinice broj: 608010

FPGA Implementation of Simple Digital Signal Processor

Butorac, Marko; Vučić, Mladen
FPGA Implementation of Simple Digital Signal Processor // Proceedings of 19th IEEE International Conference on Electronics, Circuits, and Systems
Sevilla, 2012. str. 137-140 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)

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Naslov
FPGA Implementation of Simple Digital Signal Processor

Autori
Butorac, Marko ; Vučić, Mladen

Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni

Izvornik
Proceedings of 19th IEEE International Conference on Electronics, Circuits, and Systems / - Sevilla, 2012, 137-140

ISBN
978-1-4673-1259-2

Skup
19th IEEE International Conference on Electronics, Circuits, and Systems

Mjesto i datum
Sevilla, Španjolska, 09.12.2012. - 12.12.2012

Vrsta sudjelovanja
Predavanje

Vrsta recenzije
Međunarodna recenzija

Ključne riječi
field programmable gate arrays; FPGA; soft processor; digital signal processing; DSP; inner product; complex arithmetic

Sažetak
Field-programmable gate arrays (FPGAs) allow rapid prototyping, which results in fast time to market. Unfortunately, even they cannot free the designer of hard and time-consuming development of digital hardware. This task can be simplified by moving some computations from dedicated hardware to a processor, thus raising the design process to a higher level of abstraction. In recent years such trend has also been noticeable in the design of FPGA based systems for digital signal processing. In this paper, we consider FPGA implementation of a digital signal processor that is optimized for calculation of the inner product of complex vectors. The processor allows simple cascading. It is suitable for processing of blocks of data, for example in software defined radio.

Izvorni jezik
Engleski

Znanstvena područja
Elektrotehnika



POVEZANOST RADA

Projekti:
036-0362214-2217 - Razvoj i implementacija učinkovitih postupaka za digitalnu obradu signala (Vučić, Mladen, MZO ) ( CroRIS)

Ustanove:
Fakultet elektrotehnike i računarstva, Zagreb

Profili:

Avatar Url Mladen Vučić (autor)

Avatar Url Marko Butorac (autor)

Citiraj ovu publikaciju:

Butorac, Marko; Vučić, Mladen
FPGA Implementation of Simple Digital Signal Processor // Proceedings of 19th IEEE International Conference on Electronics, Circuits, and Systems
Sevilla, 2012. str. 137-140 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)
Butorac, M. & Vučić, M. (2012) FPGA Implementation of Simple Digital Signal Processor. U: Proceedings of 19th IEEE International Conference on Electronics, Circuits, and Systems.
@article{article, author = {Butorac, Marko and Vu\v{c}i\'{c}, Mladen}, year = {2012}, pages = {137-140}, keywords = {field programmable gate arrays, FPGA, soft processor, digital signal processing, DSP, inner product, complex arithmetic}, isbn = {978-1-4673-1259-2}, title = {FPGA Implementation of Simple Digital Signal Processor}, keyword = {field programmable gate arrays, FPGA, soft processor, digital signal processing, DSP, inner product, complex arithmetic}, publisherplace = {Sevilla, \v{S}panjolska} }
@article{article, author = {Butorac, Marko and Vu\v{c}i\'{c}, Mladen}, year = {2012}, pages = {137-140}, keywords = {field programmable gate arrays, FPGA, soft processor, digital signal processing, DSP, inner product, complex arithmetic}, isbn = {978-1-4673-1259-2}, title = {FPGA Implementation of Simple Digital Signal Processor}, keyword = {field programmable gate arrays, FPGA, soft processor, digital signal processing, DSP, inner product, complex arithmetic}, publisherplace = {Sevilla, \v{S}panjolska} }

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