Pregled bibliografske jedinice broj: 601730
Influence of board geometries and external protection network configurations on the automotive microcontroller behaviour when exposed to system-related electrostatic discharge
Influence of board geometries and external protection network configurations on the automotive microcontroller behaviour when exposed to system-related electrostatic discharge, 2012., diplomski rad, diplomski, Fakultet elektrotehnike i računarstva, Zagreb
CROSBI ID: 601730 Za ispravke kontaktirajte CROSBI podršku putem web obrasca
Naslov
Influence of board geometries and external protection network configurations on the automotive microcontroller behaviour when exposed to system-related electrostatic discharge
Autori
Bačmaga, Josip
Vrsta, podvrsta i kategorija rada
Ocjenski radovi, diplomski rad, diplomski
Fakultet
Fakultet elektrotehnike i računarstva
Mjesto
Zagreb
Datum
27.09
Godina
2012
Stranica
62
Mentor
Barić, Adrijan
Neposredni voditelj
Unger, Markus
Ključne riječi
system-level electrostatic discharge ; microcontroller ; low-pass filter ; capacitor characterization
Sažetak
This work describes the influence of the external passive ESD protection network on the behaviour of Infineon's TC27x automotive microcontroller when it is exposed to a system-level ESD event. The difference between IC- and system-level ESD testing is described. The standardized ESD test parameters, set- up and classification levels are presented. The work presents the idea of protecting the IC based on the low-pass filter behaviour. In order to investigate the system behaviour, the 4-layer test PCB is desgined. The test procedure based on the generic IC EMC test specification, called BISS, is presented. Two different ESD filter realizations were analyzed. It was shown that designed ESD protection network could protect the unpowered microcontroller only up to 6 kV. The results showed that square wave 300 kHz signals carrying the information to the microcontroller could propagate through the ESD filter without significant attenuation and time delay. Two additional testboards, one without the ESD filter resistor and other completely without the filter, are assembled. These testboards are used to validate the models which simulate the impact of the filter capacitor and PCB traces on the microcontroller behaviour. The additional multi-capacitor protection network was designed to withstand ESD stress voltage of 8 kV. Additionaly, the ESD testing on the powered microcontroller was performed using the initial ESD filter configuration. The microcontroller executed a program, so functional fails could be observed. It was shown that the ESD events caused the program stop with possible program reset by re-powering the microcontroller. The application of 16 kV stress voltage caused the program stop with impossible reset.
Izvorni jezik
Engleski
Znanstvena područja
Elektrotehnika
POVEZANOST RADA
Projekti:
036-0361621-1622 - Kvaliteta signala u integriranim sklopovima s mješovitim signalom (Barić, Adrijan, MZO ) ( CroRIS)
Ustanove:
Fakultet elektrotehnike i računarstva, Zagreb