Naslov
EMC analysis of LIN test-case

Autori
Levarda, Andrej

Vrsta, podvrsta i kategorija rada
Ocjenski radovi, diplomski rad, diplomski

Fakultet
Fakultet elektrotehnike i računarstva

Mjesto
Zagreb

Datum
27.09

Godina
2012

Stranica
67

Mentor
Barić, Adrijan

Neposredni voditelj
Gillon, Renaud

Ključne riječi
electromagnetic compatibility; integrated circuits; local interconnect network; EMC; LIN

Sažetak
With the continued scaling of CMOS processes, it is possible to integrate digital, analog and RF circuitry on a single chip. However, the analog circuits are sensitive to noise which is produced by the digital circuits and propagated by the substrate. Hence, a model that will include coupling in layout design has to be developed. In this thesis problem of substrate resistance extraction has been critically reviewed, all major bottlenecks have been highlighted and several ways on how to deal with them have been proposed. New modeling approach has been proposed and all calculation procedures described, as well.

Izvorni jezik
Engleski

Znanstvena područja
Elektrotehnika

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