Naslov
Automatic architecture refinement techniques for customizing processing elements

Autori
Gorjiara, Bita ; Gajski, Daniel

Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni

Izvornik
Proceedings of 45th ACM/IEEE Design Automation Conference, 2008. DAC 2008. / - Anaheim (CA), 2008, 379-384

ISBN
978-1-60558-115-6

Skup
45th ACM/IEEE Design Automation Conference, 2008. DAC 2008.

Mjesto i datum
Anaheim (CA), Sjedinjene Američke Države, 08.06.2008. - 13.06.2008

Vrsta sudjelovanja
Predavanje

Vrsta recenzije
Međunarodna recenzija

Ključne riječi
ASIP; Datapath; GNR; High-level Synthesis; Nanocoded architectures; Netlist; No-Instruction-Set Computer (NISC); Power; Refinement

Sažetak
In this paper, we propose an approach for designing high- performance energy-efficient processing elements (PEs) using statically- scheduled nanocode-based architectures. Our approach is based on bottom-up refinement/trimming techniques that optimize a given datapath irrespective of whether it was designed manually or generated automatically. The optimizations can also preserve parts of the netlist specified by the designers, and hence, allow reuse of design efforts and can lead to predictable convergence. In this paper, we show that trimming unused and underutilized resources of typical general-purpose datapaths can lead to 30-40% average energy savings, without any performance loss. However, general-purpose architectures often compromise parallelism to make the design implementable. With our trimming approach, we can afford to have a base architecture that is not intended for implementation and has more parallelism, and then apply refinement to make it implementable. For our benchmarks, we achieved up to 1.8 times (avg. 25%) and 2.6 times (avg. 40%) performance improvement, compared to two general-purpose architectures (i.e. a 4- issue VLIW and a DLX), respectively. Additionally, the energy consumption is reduced by up to 5 times (avg. 2 times) compared to the trimmed general-purpose architectures.

Izvorni jezik
Engleski

Znanstvena područja
Računarstvo

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