Pregled bibliografske jedinice broj: 294998
A Performance Evaluator for Parameterized ASIC Architectures
A Performance Evaluator for Parameterized ASIC Architectures // Procedings of European Design Automation Conference
Grenoble, Francuska, 1994. str. 66-71 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)
CROSBI ID: 294998 Za ispravke kontaktirajte CROSBI podršku putem web obrasca
Naslov
A Performance Evaluator for Parameterized ASIC Architectures
Autori
Gong, J. ; Gajski, D. D. ; Nicolau A. ;
Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni
Izvornik
Procedings of European Design Automation Conference
/ - , 1994, 66-71
Skup
European Design Automation Conference
Mjesto i datum
Grenoble, Francuska, 01.12.1995. - 02.12.1995
Vrsta sudjelovanja
Predavanje
Vrsta recenzije
Međunarodna recenzija
Ključne riječi
ASIC and ASIP application specific architecture
Sažetak
Performance evaluation is critical for the minimization of design cost. It consists of two parts: modeling the underlying hardware engine and evaluating the performance of the application code for the model developed in the first part. In this paper, we propose a new parameterized model for application-specific architectures and present a retargetable scheduler for performance evaluation. The model, different from those proposed previously, reflects comprehensive architectural characteristics that affect hardware parallelism. The scheduler, distinguished from previous ones, takes into account not only functional and storage unit resources but also interconnect resources during the performance evaluation. The new architecture model, together with the retargetable scheduler, enables designers to accurately evaluate the performance of a variety of ASIC and ASIP architectures
Izvorni jezik
Engleski
Znanstvena područja
Računarstvo
POVEZANOST RADA
Ustanove:
Fakultet elektrotehnike i računarstva, Zagreb
Profili:
Daniel Gajski
(autor)