Naslov
Multiplication Circuit Using Column Compression

Autori
Gajski, D. D. ; Vora, C. R.

Broj patenta
US 4, 168, 530

Godina
1979

Datum patenta
18.09.1979.

Nositelj prava
Burroughs Corporation, Champlaign, US

Sažetak
A high speed parallel operation, multiplication circuit is provided having a multiplier multiplexor which may function in combination with a column compressor for providing a resultant product, wherein, preferably, the multiplier multiplexor has been implemented using a modified Booth's algorithm, and wherein the column compressor operates to process every column within the same propagation delay whereby every input may create an output in essentially the same propagation time, i.e., true parallel operation requiring preferably no more than an average column propagation delay time.

Izvorni jezik
Engleski

Znanstvena područja
Računarstvo

POVEZANOST RADA