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Pregled bibliografske jedinice broj: 294661

Performance-Constrained Hierarchical Pipelining for Behaviors, Loops, and Operations


Bakshi, S.; Gajski, Danijel
Performance-Constrained Hierarchical Pipelining for Behaviors, Loops, and Operations // ACM Transactions on Design Automation of Electronic Systems, 6 (2001), 1; 1-25 (međunarodna recenzija, članak, znanstveni)


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Naslov
Performance-Constrained Hierarchical Pipelining for Behaviors, Loops, and Operations

Autori
Bakshi, S. ; Gajski, Danijel

Izvornik
ACM Transactions on Design Automation of Electronic Systems (1084-4309) 6 (2001), 1; 1-25

Vrsta, podvrsta i kategorija rada
Radovi u časopisima, članak, znanstveni

Ključne riječi
DSP (digital signal processing) systems; component selection; hierarchical pipelining; loop pipelining; pipelined systems; scheduling

Sažetak
Behavioral specifications of DSP systems generally contain a number of nested loops. In order to obtain high date rates for such systems, it is necessary to pipeline the system within the behavior, within the loop bodies, and also within the operations. In order to hierarchically pipeline a performance-constrained system, an important step consists of distributing the performance constraint among the loops in such a manner that the constraint is satisfied and design cost is minimized. This paper presents an algorithm for propagating constraints and hierarchically pipelining a given throughput-constrained system. Along with pipelining, the algorithm schedules the operations within the loop bodies and selects components for them, with the aim of minimizing cost while satisfying the constraint propagated to the loop body. Results demonstrate the necessity of pipelining across the three granularity levels in order to obtain high performance designs. They also demonstrate the feasibility and quality of our approach, the indicate that it may be efficiently used for synthesizing or estimating within system-level design.

Izvorni jezik
Engleski

Znanstvena područja
Računarstvo



POVEZANOST RADA


Ustanove:
Fakultet elektrotehnike i računarstva, Zagreb

Profili:

Avatar Url Daniel Gajski (autor)


Citiraj ovu publikaciju:

Bakshi, S.; Gajski, Danijel
Performance-Constrained Hierarchical Pipelining for Behaviors, Loops, and Operations // ACM Transactions on Design Automation of Electronic Systems, 6 (2001), 1; 1-25 (međunarodna recenzija, članak, znanstveni)
Bakshi, S. & Gajski, D. (2001) Performance-Constrained Hierarchical Pipelining for Behaviors, Loops, and Operations. ACM Transactions on Design Automation of Electronic Systems, 6 (1), 1-25.
@article{article, author = {Bakshi, S. and Gajski, Danijel}, year = {2001}, pages = {1-25}, keywords = {DSP (digital signal processing) systems, component selection, hierarchical pipelining, loop pipelining, pipelined systems, scheduling}, journal = {ACM Transactions on Design Automation of Electronic Systems}, volume = {6}, number = {1}, issn = {1084-4309}, title = {Performance-Constrained Hierarchical Pipelining for Behaviors, Loops, and Operations}, keyword = {DSP (digital signal processing) systems, component selection, hierarchical pipelining, loop pipelining, pipelined systems, scheduling} }
@article{article, author = {Bakshi, S. and Gajski, Danijel}, year = {2001}, pages = {1-25}, keywords = {DSP (digital signal processing) systems, component selection, hierarchical pipelining, loop pipelining, pipelined systems, scheduling}, journal = {ACM Transactions on Design Automation of Electronic Systems}, volume = {6}, number = {1}, issn = {1084-4309}, title = {Performance-Constrained Hierarchical Pipelining for Behaviors, Loops, and Operations}, keyword = {DSP (digital signal processing) systems, component selection, hierarchical pipelining, loop pipelining, pipelined systems, scheduling} }

Časopis indeksira:


  • Current Contents Connect (CCC)
  • Web of Science Core Collection (WoSCC)
    • Science Citation Index Expanded (SCI-EXP)
    • SCI-EXP, SSCI i/ili A&HCI
  • Scopus





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