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Pregled bibliografske jedinice broj: 294638

System Design Methodologies: Aiming at the 100 Hour Design Cycle


Gajski, Danijel; Narayan, S.; Ramachandran, L.; Vahid, F.; Fung, P.
System Design Methodologies: Aiming at the 100 Hour Design Cycle // IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 4 (1996), 1; 70-82 (međunarodna recenzija, članak, znanstveni)


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Naslov
System Design Methodologies: Aiming at the 100 Hour Design Cycle

Autori
Gajski, Danijel ; Narayan, S. ; Ramachandran, L. ; Vahid, F. ; Fung, P.

Izvornik
IEEE Transactions on Very Large Scale Integration (VLSI) Systems (1063-8210) 4 (1996), 1; 70-82

Vrsta, podvrsta i kategorija rada
Radovi u časopisima, članak, znanstveni

Ključne riječi
chip level design

Sažetak
As methodologies and tools for chip-level design mature, design effort becomes focused on increasingly higher levels of abstraction. We present a tutorial on a design methodology for chip and system design and present a test case that justifies the future goal of a 100 h design cycle.

Izvorni jezik
Engleski

Znanstvena područja
Računarstvo



POVEZANOST RADA


Ustanove:
Fakultet elektrotehnike i računarstva, Zagreb

Profili:

Avatar Url Daniel Gajski (autor)


Citiraj ovu publikaciju:

Gajski, Danijel; Narayan, S.; Ramachandran, L.; Vahid, F.; Fung, P.
System Design Methodologies: Aiming at the 100 Hour Design Cycle // IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 4 (1996), 1; 70-82 (međunarodna recenzija, članak, znanstveni)
Gajski, D., Narayan, S., Ramachandran, L., Vahid, F. & Fung, P. (1996) System Design Methodologies: Aiming at the 100 Hour Design Cycle. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 4 (1), 70-82.
@article{article, author = {Gajski, Danijel and Narayan, S. and Ramachandran, L. and Vahid, F. and Fung, P.}, year = {1996}, pages = {70-82}, keywords = {chip level design}, journal = {IEEE Transactions on Very Large Scale Integration (VLSI) Systems}, volume = {4}, number = {1}, issn = {1063-8210}, title = {System Design Methodologies: Aiming at the 100 Hour Design Cycle}, keyword = {chip level design} }
@article{article, author = {Gajski, Danijel and Narayan, S. and Ramachandran, L. and Vahid, F. and Fung, P.}, year = {1996}, pages = {70-82}, keywords = {chip level design}, journal = {IEEE Transactions on Very Large Scale Integration (VLSI) Systems}, volume = {4}, number = {1}, issn = {1063-8210}, title = {System Design Methodologies: Aiming at the 100 Hour Design Cycle}, keyword = {chip level design} }

Časopis indeksira:


  • Current Contents Connect (CCC)
  • Web of Science Core Collection (WoSCC)
    • SCI-EXP, SSCI i/ili A&HCI
  • Scopus





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