Naslov
SpecSyn: An Environment Supporting the Specify-Explore-Refine Paradigm

Autori
Gajski, Danijel ; Vahid, F. ; Narayan, S. ; Gong, J.

Izvornik
IEEE Transactions on Very Large Scale Integration (VLSI) Systems (1063-8210) 6 (1998), 1; 84-100

Vrsta, podvrsta i kategorija rada
Radovi u časopisima, članak, znanstveni

Ključne riječi
embedded systems; estimation; exploration; hardware/software codesign; hierarchical modeling methodology; partitioning; refinement; specification; system design

Sažetak
System-level design issues are gaining increasing attention, as behavioral synthesis tools and methodologies mature. We present the SpecSyn system-level design environment, which supports the new specify-explore-refine (SER) design paradigm. This three-step approach to design includes precise specification of system functionality, rapid exploration of numerous system-level design options, and refinement of the specification into one reflecting the chosen option. A system-level design option consists of an allocation of system components, such as standard and custom processors, memories, and buses, and a partitioning of functionality among those components. After refinement, the functionality assigned to each component can then he synthesized to hardware or compiled to software. We describe the issues and approaches for each part of the SpecSyn environment. The new paradigm and environment are expected to lead to a more than ten times reduction in design time, and our experiments support this expectation

Izvorni jezik
Engleski

Znanstvena područja
Računarstvo

POVEZANOST RADA