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Pregled bibliografske jedinice broj: 199467

Architecture of SIP Load Balancer


Matić, Viktor; Ljubičić, Mijo; Mihaliček, Antun
Architecture of SIP Load Balancer // Telecommunication & Infromation / Golubić Stjepan, Mikac Branko, Hudek Vlasta (ur.).
Rijeka: Hrvatska udruga za informacijsku i komunikacijsku tehnologiju, elektroniku i mikroelektroniku - MIPRO, 2005. str. 97-100 (predavanje, domaća recenzija, cjeloviti rad (in extenso), ostalo)


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Naslov
Architecture of SIP Load Balancer

Autori
Matić, Viktor ; Ljubičić, Mijo ; Mihaliček, Antun

Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), ostalo

Izvornik
Telecommunication & Infromation / Golubić Stjepan, Mikac Branko, Hudek Vlasta - Rijeka : Hrvatska udruga za informacijsku i komunikacijsku tehnologiju, elektroniku i mikroelektroniku - MIPRO, 2005, 97-100

Skup
MIPRO 2005, 28th International Convention

Mjesto i datum
Opatija, Hrvatska, 30.05.2005. - 03.06.2005

Vrsta sudjelovanja
Predavanje

Vrsta recenzije
Domaća recenzija

Ključne riječi
SIP; Load Balancer; Proxy; VoIP; DSR

Sažetak
As a consequence of the expected expansion in the number of VoIP technology users in the near future, congestion of nodes that manage VoIP traffic (User Agent Servers - UAS'es) will most likely become a significant problem. This problem can be dealt in two ways: either by using extremely powerful UAS'es or by using traffic balancing among several UAS'es. The latter represents a better solution from economical point of view. It also improves the reliability of the system, potentially increasing the provided quality of service (QoS) as well. Because of SIP's (Session Initiation Protocol) domination among similar VoIP protocols, our work is focused on this protocol. SIP load balancing mechanism has purpose of distributing SIP traffic among several SIP servers using an additional load-balancing device. This device intercepts traffic designated for the SIP domain and directs it to one of the available servers. The load-balancing process is completely transparent to the end user. This work analyzes two basic architectures. The first architecture is called "Flat based" architecture which is network implementation where the IP addresses of the VIP addresses (Virtual IP) and the IP addresses of the real servers are on the same subnet. The second one is known as the NAT-based (Network Address Translator) network architecture, which is network implementation where the IP addresses of the VIP addresses and real servers are on different subnets.

Izvorni jezik
Engleski

Znanstvena područja
Elektrotehnika



POVEZANOST RADA


Projekti:
0036009

Ustanove:
Fakultet elektrotehnike i računarstva, Zagreb

Profili:

Avatar Url Viktor Matić (autor)


Citiraj ovu publikaciju:

Matić, Viktor; Ljubičić, Mijo; Mihaliček, Antun
Architecture of SIP Load Balancer // Telecommunication & Infromation / Golubić Stjepan, Mikac Branko, Hudek Vlasta (ur.).
Rijeka: Hrvatska udruga za informacijsku i komunikacijsku tehnologiju, elektroniku i mikroelektroniku - MIPRO, 2005. str. 97-100 (predavanje, domaća recenzija, cjeloviti rad (in extenso), ostalo)
Matić, V., Ljubičić, M. & Mihaliček, A. (2005) Architecture of SIP Load Balancer. U: Golubić Stjepan, Mikac Branko, Hudek Vlasta (ur.)Telecommunication & Infromation.
@article{article, author = {Mati\'{c}, Viktor and Ljubi\v{c}i\'{c}, Mijo and Mihali\v{c}ek, Antun}, year = {2005}, pages = {97-100}, keywords = {SIP, Load Balancer, Proxy, VoIP, DSR}, title = {Architecture of SIP Load Balancer}, keyword = {SIP, Load Balancer, Proxy, VoIP, DSR}, publisher = {Hrvatska udruga za informacijsku i komunikacijsku tehnologiju, elektroniku i mikroelektroniku - MIPRO}, publisherplace = {Opatija, Hrvatska} }
@article{article, author = {Mati\'{c}, Viktor and Ljubi\v{c}i\'{c}, Mijo and Mihali\v{c}ek, Antun}, year = {2005}, pages = {97-100}, keywords = {SIP, Load Balancer, Proxy, VoIP, DSR}, title = {Architecture of SIP Load Balancer}, keyword = {SIP, Load Balancer, Proxy, VoIP, DSR}, publisher = {Hrvatska udruga za informacijsku i komunikacijsku tehnologiju, elektroniku i mikroelektroniku - MIPRO}, publisherplace = {Opatija, Hrvatska} }




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