Pregled bibliografske jedinice broj: 15499
LL-DPLL Loop Behaviour at Input Signal Phase Jump with Frequency Offset
LL-DPLL Loop Behaviour at Input Signal Phase Jump with Frequency Offset // Proceedings of the 40th ELMAR International Symposium / Radanović, Božidar ; Jerič, Vilim (ur.).
Zadar: Hrvatsko društvo Elektronika u pomorstvu (ELMAR), 1998. str. 144-148 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)
CROSBI ID: 15499 Za ispravke kontaktirajte CROSBI podršku putem web obrasca
Naslov
LL-DPLL Loop Behaviour at Input Signal Phase Jump with Frequency Offset
Autori
Bajrić, Himzo ; Modlic, Borivoj
Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni
Izvornik
Proceedings of the 40th ELMAR International Symposium
/ Radanović, Božidar ; Jerič, Vilim - Zadar : Hrvatsko društvo Elektronika u pomorstvu (ELMAR), 1998, 144-148
Skup
40th International Symposium Electronics in Marine
Mjesto i datum
Zadar, Hrvatska, 23.06.1998. - 25.06.1998
Vrsta sudjelovanja
Predavanje
Vrsta recenzije
Međunarodna recenzija
Ključne riječi
expected synchronization time; mean synchronization time; recurrent algorithm
Sažetak
Digital phase locked loop dynamic behaviour is very important parameter in many applications. Especially, it is considerable in synchronous digital systems where the parameters connected to synchronism establishing speed are basic system parameters. In this paper behaviour of a digital phase loop class, so called LL-DPLL (Lead Lag-Digital Phase Locked Loop) in dynamic conditions of synchronism establishing is analysed. The new recurrent algorithm for expected synchronisation time and mean synchronisation time determination is presented. The obtained results are presented in graphics form.
Izvorni jezik
Engleski
Znanstvena područja
Elektrotehnika
POVEZANOST RADA
Projekti:
036018
Ustanove:
Fakultet elektrotehnike i računarstva, Zagreb
Profili:
Borivoj Modlic
(autor)
