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Pregled bibliografske jedinice broj: 1256503

Chip-Level ESD Verification Using Graph-Theory Based Approach

Galic, Vlatko; Wieers, Aarnout; Gillon, Renaud; Baric, Adrijan
Chip-Level ESD Verification Using Graph-Theory Based Approach // 2019 International Symposium on Electromagnetic Compatibility - EMC EUROPE
Barcelona, Španjolska: Institute of Electrical and Electronics Engineers (IEEE), 2019. str. 875-880 doi:10.1109/emceurope.2019.8872053 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)

CROSBI ID: 1256503 Za ispravke kontaktirajte CROSBI podršku putem web obrasca

Naslov
Chip-Level ESD Verification Using Graph-Theory Based Approach

Autori
Galic, Vlatko ; Wieers, Aarnout ; Gillon, Renaud ; Baric, Adrijan

Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni

ISBN
978-1-7281-0595-6

Skup
2019 International Symposium on Electromagnetic Compatibility - EMC EUROPE

Mjesto i datum
Barcelona, Španjolska, 02.09.2019. - 06.09.2019

Vrsta sudjelovanja
Predavanje

Vrsta recenzije
Međunarodna recenzija

Ključne riječi
ESD ; full-chip simulations ; bipolar technology ; ESD verification ; graph theory ; ESD current paths

Sažetak
An Electrostatic Discharge (ESD) simulation and verification flow that has been demonstrated on a real design in bipolar technology is presented in this work. The described flow can be used to verify the level of ESD robustness of integrated circuit (IC) designs. Secondly, it is possible to identify the ESD current paths between any two nodes in the design, and the flow can determine which devices will fail in the case of a catastrophic ESD event. The presented flow is based on a graph-theory Floyd-Warshall algorithm and previously defined breaking voltage (BV) models.

Izvorni jezik
Engleski

Znanstvena područja
Elektrotehnika



POVEZANOST RADA

Ustanove:
Fakultet elektrotehnike i računarstva, Zagreb

Profili:

Avatar Url Vlatko Galić (autor)

Avatar Url Adrijan Barić (autor)

Poveznice na cjeloviti tekst rada:

doi

Citiraj ovu publikaciju:

Galic, Vlatko; Wieers, Aarnout; Gillon, Renaud; Baric, Adrijan
Chip-Level ESD Verification Using Graph-Theory Based Approach // 2019 International Symposium on Electromagnetic Compatibility - EMC EUROPE
Barcelona, Španjolska: Institute of Electrical and Electronics Engineers (IEEE), 2019. str. 875-880 doi:10.1109/emceurope.2019.8872053 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)
Galic, V., Wieers, A., Gillon, R. & Baric, A. (2019) Chip-Level ESD Verification Using Graph-Theory Based Approach. U: 2019 International Symposium on Electromagnetic Compatibility - EMC EUROPE doi:10.1109/emceurope.2019.8872053.
@article{article, author = {Galic, Vlatko and Wieers, Aarnout and Gillon, Renaud and Baric, Adrijan}, year = {2019}, pages = {875-880}, DOI = {10.1109/emceurope.2019.8872053}, keywords = {ESD, full-chip simulations, bipolar technology, ESD verification, graph theory, ESD current paths}, doi = {10.1109/emceurope.2019.8872053}, isbn = {978-1-7281-0595-6}, title = {Chip-Level ESD Verification Using Graph-Theory Based Approach}, keyword = {ESD, full-chip simulations, bipolar technology, ESD verification, graph theory, ESD current paths}, publisher = {Institute of Electrical and Electronics Engineers (IEEE)}, publisherplace = {Barcelona, \v{S}panjolska} }
@article{article, author = {Galic, Vlatko and Wieers, Aarnout and Gillon, Renaud and Baric, Adrijan}, year = {2019}, pages = {875-880}, DOI = {10.1109/emceurope.2019.8872053}, keywords = {ESD, full-chip simulations, bipolar technology, ESD verification, graph theory, ESD current paths}, doi = {10.1109/emceurope.2019.8872053}, isbn = {978-1-7281-0595-6}, title = {Chip-Level ESD Verification Using Graph-Theory Based Approach}, keyword = {ESD, full-chip simulations, bipolar technology, ESD verification, graph theory, ESD current paths}, publisher = {Institute of Electrical and Electronics Engineers (IEEE)}, publisherplace = {Barcelona, \v{S}panjolska} }

Časopis indeksira:


  • Web of Science Core Collection (WoSCC)
    • SCI-EXP, SSCI i/ili A&HCI
  • Scopus

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