Naslov
Top level design contribution to the design process

Autori
Nožica, Žarko ; Seser, Tomislav

Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni

Izvornik
Economic and Social Development / - , 2020, 337-349

Skup
53rd International Scientific Conference on Economic and Social Development ; 6th ITEM Conference: "Innovation, Technology, Education and Management"

Mjesto i datum
Sveti Martin na Muri, Hrvatska, 10.09.2020. - 11.09.2020

Vrsta sudjelovanja
Ostalo

Vrsta recenzije
Recenziran

Ključne riječi
Hardware/software partitioning, Algorithms analysis, Top level design, System-level design

Sažetak
Software package VisualSIM is used for modeling and simulation of electronic systems at the top level. Using it, designer can perform architectural analysis of algorithms, components, software instructions and hardware/ software partitioning. VisualSim Architect, as a commercial version of the research project at University of California, Berkeley, has many attributes that make it applicable for enhancing the education process, hands-on student experience and projects. It has a powerful graphical user interface and can be used for performance trade-off analyses using indicators such as bandwidth utilization, application response time and buffer requirements. In the article we analyze system level modeling challenges and consider the tool from the applicability in education process and creativity point of view.

Izvorni jezik
Hrvatski

Znanstvena područja
Računarstvo, Interdisciplinarne tehničke znanosti, Interdisciplinarne društvene znanosti

POVEZANOST RADA