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Pregled bibliografske jedinice broj: 1061673

Towards a synthetic load generator framework for validating schedules in HPC environment


Krpić, Zdravko; Lukić, Ivica; Köhler, Mirko
Towards a synthetic load generator framework for validating schedules in HPC environment // 2020 19th International Symposium INFOTEH-JAHORINA (INFOTEH)
Jahorina, Bosna i Hercegovina: Institute of Electrical and Electronics Engineers (IEEE), 2020. str. 1-6 doi:10.1109/infoteh48170.2020.9066314 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)


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Naslov
Towards a synthetic load generator framework for validating schedules in HPC environment

Autori
Krpić, Zdravko ; Lukić, Ivica ; Köhler, Mirko

Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni

Izvornik
2020 19th International Symposium INFOTEH-JAHORINA (INFOTEH) / - : Institute of Electrical and Electronics Engineers (IEEE), 2020, 1-6

ISBN
978-1-7281-4775-8

Skup
19th International Symposium INFOTEH-JAHORINA

Mjesto i datum
Jahorina, Bosna i Hercegovina, 18.03.2020. - 20.03.2020

Vrsta sudjelovanja
Predavanje

Vrsta recenzije
Međunarodna recenzija

Ključne riječi
High performance computing ; scheduling ; graph-based parallel workloads ; DAG

Sažetak
Most of the scientific parallel and distributed applications require significant amount of time to complete on huge and expensive computing systems. Often, these applications are executed multiple times, making their scheduling a critical process for the runtime performance. One way to validate effectiveness of a schedule is to run the application on the actual hardware, which takes a lot of time and resources and is largely unfeasible. In this work we present a baseline for an adjustable-scale graph-based parallel workload executor framework for executing custom-scaled parallel applications given as graphs using synthetic load for the tasks, the GRAPPLER. The idea behind GRAPPLER is to operate as a schedule validator whose execution traces can provide valuable insights into runtime bottlenecks of the application, platform and the scheduler.

Izvorni jezik
Engleski

Znanstvena područja
Računarstvo, Informacijske i komunikacijske znanosti



POVEZANOST RADA


Projekti:
ZUP2018-43

Ustanove:
Fakultet elektrotehnike, računarstva i informacijskih tehnologija Osijek

Profili:

Avatar Url Zdravko Krpić (autor)

Avatar Url Mirko Köhler (autor)

Avatar Url Ivica Lukić (autor)

Poveznice na cjeloviti tekst rada:

doi ieeexplore.ieee.org

Citiraj ovu publikaciju:

Krpić, Zdravko; Lukić, Ivica; Köhler, Mirko
Towards a synthetic load generator framework for validating schedules in HPC environment // 2020 19th International Symposium INFOTEH-JAHORINA (INFOTEH)
Jahorina, Bosna i Hercegovina: Institute of Electrical and Electronics Engineers (IEEE), 2020. str. 1-6 doi:10.1109/infoteh48170.2020.9066314 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)
Krpić, Z., Lukić, I. & Köhler, M. (2020) Towards a synthetic load generator framework for validating schedules in HPC environment. U: 2020 19th International Symposium INFOTEH-JAHORINA (INFOTEH) doi:10.1109/infoteh48170.2020.9066314.
@article{article, author = {Krpi\'{c}, Zdravko and Luki\'{c}, Ivica and K\"{o}hler, Mirko}, year = {2020}, pages = {1-6}, DOI = {10.1109/infoteh48170.2020.9066314}, keywords = {High performance computing, scheduling, graph-based parallel workloads, DAG}, doi = {10.1109/infoteh48170.2020.9066314}, isbn = {978-1-7281-4775-8}, title = {Towards a synthetic load generator framework for validating schedules in HPC environment}, keyword = {High performance computing, scheduling, graph-based parallel workloads, DAG}, publisher = {Institute of Electrical and Electronics Engineers (IEEE)}, publisherplace = {Jahorina, Bosna i Hercegovina} }
@article{article, author = {Krpi\'{c}, Zdravko and Luki\'{c}, Ivica and K\"{o}hler, Mirko}, year = {2020}, pages = {1-6}, DOI = {10.1109/infoteh48170.2020.9066314}, keywords = {High performance computing, scheduling, graph-based parallel workloads, DAG}, doi = {10.1109/infoteh48170.2020.9066314}, isbn = {978-1-7281-4775-8}, title = {Towards a synthetic load generator framework for validating schedules in HPC environment}, keyword = {High performance computing, scheduling, graph-based parallel workloads, DAG}, publisher = {Institute of Electrical and Electronics Engineers (IEEE)}, publisherplace = {Jahorina, Bosna i Hercegovina} }

Citati:





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