Pregled bibliografske jedinice broj: 10594
A methodology for digital real time simulation of dynamic systems using modern DSPs
A methodology for digital real time simulation of dynamic systems using modern DSPs // Simulation practice and theory, 5 (1997), 2; 137-151 (međunarodna recenzija, članak, znanstveni)
CROSBI ID: 10594 Za ispravke kontaktirajte CROSBI podršku putem web obrasca
Naslov
A methodology for digital real time simulation of dynamic systems using modern DSPs
Autori
Ćosić, Krešimir ; Kopriva, Ivica ; Šikić, Tomislav
Izvornik
Simulation practice and theory (0928-4869) 5
(1997), 2;
137-151
Vrsta, podvrsta i kategorija rada
Radovi u časopisima, članak, znanstveni
Ključne riječi
Real time simulations; Parallel processing; Pre-emptive static scheduling policy; Hard deadline periodic tasks; Digital signal processors; Asynchronous parallel interprocessor communication
Sažetak
The speedup factor in real time simulation of dynamic systems using multiprocessor resources depends on: the architecture of the multiprocessor system, type of interconnection between parallel processors, numerical methods and techniques used for discretization and task assignment and scheduling policy. The minimization of the number of processors needed for real time simulation requires the minimization of processors times for interprocessor communication and efficient scheduling policy. Therefore, this article presents a methodology for the real time simulation of dynamic systems including a new pre-emptive static assignment and scheduling policy. The advantages of applying digital signal processor with parallel architecure, for example TMS320C40, in real time simulation have been described. Some important issues in real time architectures necessary for efficient multiprocessor real time simulations, such as multiple I/O channels, concurrent I/O and CPU processing, direct high speed interprocessor communications, fast context switching, multiple buses, multiple memories, and powerful arithmetic units are inherent to this processor. These features minimize interprocessor communication time and maximize sustained CPU performance.
Izvorni jezik
Engleski
Znanstvena područja
Elektrotehnika
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Časopis indeksira:
- Scopus