Pregled bibliografske jedinice broj: 1018872
Characterization of Digital IC for Sub-Nanosecond Dead-Time Adjustment Used in Synchronous DC-DC Converters
Characterization of Digital IC for Sub-Nanosecond Dead-Time Adjustment Used in Synchronous DC-DC Converters // Proceedings of New Generation of Circuits and Systems (NGCAS)
Valletta, Malta, 2018. str. 74-77 doi:10.1109/NGCAS.2018.8572114 (poster, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)
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Naslov
Characterization of Digital IC for Sub-Nanosecond Dead-Time Adjustment Used in Synchronous DC-DC Converters
Autori
Bačmaga, Josip ; Blečić, Raul ; Voaden, Roger ; Barić, Adrijan
Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni
Izvornik
Proceedings of New Generation of Circuits and Systems (NGCAS)
/ - , 2018, 74-77
Skup
2nd New Generation of Circuits and Systems Conference (NGCAS)
Mjesto i datum
Valletta, Malta, 20.11.2018
Vrsta sudjelovanja
Poster
Vrsta recenzije
Međunarodna recenzija
Ključne riječi
CMOS ; pulse-width modulation ; synchronous switching converters ; tapped delay-chain
Sažetak
A digital integrated circuit for sub-nanosecond dead-time adjustment is characterized by time- domain measurements. The dead-time adjustment circuit (DTAC) generates two complementary signals for the switches used in synchronous DC- DC converter application. The control signals are generated from a PWM signal that is applied from a signal generator to the input of the DTAC. The circuit is based on a tapped delay-chain architecture and it is designed for frequencies up to 10 MHz. The DTAC is designed and fabricated in a 180-nm CMOS process. The characterization setup is shown and operating principle of the designed circuit is described. The generated dead times are measured for the whole range of the achievable discrete time-delay values at different switching frequencies.
Izvorni jezik
Engleski