Pregled bibliografske jedinice broj: 1012660
Design Methodology of an On–Chip Inductor in 180 nm CMOS Technology
Design Methodology of an On–Chip Inductor in 180 nm CMOS Technology // 2019 42nd International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO)
Opatija, Hrvatska, 2019. str. 65-69 doi:10.23919/MIPRO.2019.8756789 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)
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Naslov
Design Methodology of an On–Chip Inductor in 180 nm CMOS Technology
Autori
Brezovec, Ivan ; Mikulić, Josip ; Schatzberger, Gregor ; Barić, Adrijan
Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni
Izvornik
2019 42nd International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO)
/ - , 2019, 65-69
Skup
42nd International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO 2019)
Mjesto i datum
Opatija, Hrvatska, 20.05.2019. - 24.05.2019
Vrsta sudjelovanja
Predavanje
Vrsta recenzije
Međunarodna recenzija
Ključne riječi
LC resonator ; on–chip inductor ; electromagnetic simulations ; Q–factor
Sažetak
This paper presents the design methodology for an on–chip inductor in 180 nm CMOS technology, intended for a fully integrated LC oscillator. The design method uses the model based on the physical interpretation of the inductor, and optimizes the design with respect to the Q –factor. Resulting from the optimization procedure, the inductor is designed for the on–chip LC resonator, having the nominal inductance value of $L_{;S};=2.62$ nH and Q –factor of 5.42 at 1 GHz. Finally, the designed inductor is verified by the EM simulations, and the results are compared to the physical model used for the optimization.
Izvorni jezik
Engleski
Znanstvena područja
Elektrotehnika
POVEZANOST RADA
Ustanove:
Fakultet elektrotehnike i računarstva, Zagreb