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Pregled bibliografske jedinice broj: 824277

Function-level Performance Estimation for Heterogeneous MPSoC Platforms


Ivošević, Danko; Frid, Nikolina; Sruk, Vlado
Function-level Performance Estimation for Heterogeneous MPSoC Platforms // ZINC 2016 / Velikić, Gordana (ur.).
Novi Sad: EDAS Conference Services, 2016. str. 37-40 doi:10.1109/ZINC.2016.7513650 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)


CROSBI ID: 824277 Za ispravke kontaktirajte CROSBI podršku putem web obrasca

Naslov
Function-level Performance Estimation for Heterogeneous MPSoC Platforms

Autori
Ivošević, Danko ; Frid, Nikolina ; Sruk, Vlado

Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni

Izvornik
ZINC 2016 / Velikić, Gordana - Novi Sad : EDAS Conference Services, 2016, 37-40

Skup
Zooming Innovation in Consumer Electronics 2016

Mjesto i datum
Novi Sad, Srbija, 01.06.2016. - 02.06.2016

Vrsta sudjelovanja
Predavanje

Vrsta recenzije
Međunarodna recenzija

Ključne riječi
Embedded Computer Systems ; Heterogeneous Computing ; FPGA ; System-level design ; Design Space Exploration ; Performance Estimation

Sažetak
Main challenge of system-level design is fast and accurate performance estimation on heterogeneous multiprocessor system-on-chip (MPSoC) platforms in early design stages. In this paper the authors present a design flow of a novel framework for automated early high- level software performance estimation based on source code analysis using elementary operation concept. The tools implemented within the framework support performance evaluation by application C code intermediate representation analysis and production of profiling data per single line of code instruction. The concept of elementary operation usage in gaining the appropriate application profiling is tested on two processor cores as representatives of different processing elements often used inside MPSoC platforms. Preliminary results demonstrate the ability to provide fast and efficient design space exploration with high accuracy of performance estimation.

Izvorni jezik
Engleski

Znanstvena područja
Računarstvo



POVEZANOST RADA


Ustanove:
Fakultet elektrotehnike i računarstva, Zagreb

Profili:

Avatar Url Vlado Sruk (autor)

Avatar Url Nikolina Frid (autor)

Avatar Url Danko Ivošević (autor)

Poveznice na cjeloviti tekst rada:

Pristup cjelovitom tekstu rada doi

Citiraj ovu publikaciju:

Ivošević, Danko; Frid, Nikolina; Sruk, Vlado
Function-level Performance Estimation for Heterogeneous MPSoC Platforms // ZINC 2016 / Velikić, Gordana (ur.).
Novi Sad: EDAS Conference Services, 2016. str. 37-40 doi:10.1109/ZINC.2016.7513650 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)
Ivošević, D., Frid, N. & Sruk, V. (2016) Function-level Performance Estimation for Heterogeneous MPSoC Platforms. U: Velikić, G. (ur.)ZINC 2016 doi:10.1109/ZINC.2016.7513650.
@article{article, author = {Ivo\v{s}evi\'{c}, Danko and Frid, Nikolina and Sruk, Vlado}, editor = {Veliki\'{c}, G.}, year = {2016}, pages = {37-40}, DOI = {10.1109/ZINC.2016.7513650}, keywords = {Embedded Computer Systems, Heterogeneous Computing, FPGA, System-level design, Design Space Exploration, Performance Estimation}, doi = {10.1109/ZINC.2016.7513650}, title = {Function-level Performance Estimation for Heterogeneous MPSoC Platforms}, keyword = {Embedded Computer Systems, Heterogeneous Computing, FPGA, System-level design, Design Space Exploration, Performance Estimation}, publisher = {EDAS Conference Services}, publisherplace = {Novi Sad, Srbija} }
@article{article, author = {Ivo\v{s}evi\'{c}, Danko and Frid, Nikolina and Sruk, Vlado}, editor = {Veliki\'{c}, G.}, year = {2016}, pages = {37-40}, DOI = {10.1109/ZINC.2016.7513650}, keywords = {Embedded Computer Systems, Heterogeneous Computing, FPGA, System-level design, Design Space Exploration, Performance Estimation}, doi = {10.1109/ZINC.2016.7513650}, title = {Function-level Performance Estimation for Heterogeneous MPSoC Platforms}, keyword = {Embedded Computer Systems, Heterogeneous Computing, FPGA, System-level design, Design Space Exploration, Performance Estimation}, publisher = {EDAS Conference Services}, publisherplace = {Novi Sad, Srbija} }

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