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Pregled bibliografske jedinice broj: 633639

An Introduction to High-Level Synthesis

Coussy, Phillipe; Gajski, Daniel D.; Meredith, Michael; Takach, Andres
An Introduction to High-Level Synthesis // IEEE design & test of computers, 26 (2009), 4; 8-17 doi:10.1109/MDT.2009.69 (međunarodna recenzija, članak, znanstveni)

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Naslov
An Introduction to High-Level Synthesis

Autori
Coussy, Phillipe ; Gajski, Daniel D. ; Meredith, Michael ; Takach, Andres

Izvornik
IEEE design & test of computers (0740-7475) 26 (2009), 4; 8-17

Vrsta, podvrsta i kategorija rada
Radovi u časopisima, članak, znanstveni

Ključne riječi
high level synthesis; HLS techniques; abstraction level design; high-level synthesis; optimized RTL hardware; Application software; Assembly; Circuit simulation; Circuit synthesis; Computer architecture; Design methodology; Design optimization; Hardware design languages; High level synthesis; Space exploration; RTL abstraction; architectures; custom processors; design and test; hardware synthesis and verification; high-level synthesis

Sažetak
High-level synthesis raises the design abstraction level and allows rapid generation of optimized RTL hardware for performance, area, and power requirements. This article gives an overview of state-of-the-art HLS techniques and tools.

Izvorni jezik
Engleski

Znanstvena područja
Računarstvo



POVEZANOST RADA

Projekti:
036-0362980-1929 - Oblikovanje okolina za ugradene sustave (Sruk, Vlado, MZO ) ( CroRIS)

Ustanove:
Fakultet elektrotehnike i računarstva, Zagreb

Profili:

Avatar Url Daniel Gajski (autor)

Poveznice na cjeloviti tekst rada:

Pristup cjelovitom tekstu rada doi ieeexplore.ieee.org

Citiraj ovu publikaciju:

Coussy, Phillipe; Gajski, Daniel D.; Meredith, Michael; Takach, Andres
An Introduction to High-Level Synthesis // IEEE design & test of computers, 26 (2009), 4; 8-17 doi:10.1109/MDT.2009.69 (međunarodna recenzija, članak, znanstveni)
Coussy, P., Gajski, D., Meredith, M. & Takach, A. (2009) An Introduction to High-Level Synthesis. IEEE design & test of computers, 26 (4), 8-17 doi:10.1109/MDT.2009.69.
@article{article, author = {Coussy, Phillipe and Gajski, Daniel D. and Meredith, Michael and Takach, Andres}, year = {2009}, pages = {8-17}, DOI = {10.1109/MDT.2009.69}, keywords = {high level synthesis, HLS techniques, abstraction level design, high-level synthesis, optimized RTL hardware, Application software, Assembly, Circuit simulation, Circuit synthesis, Computer architecture, Design methodology, Design optimization, Hardware design languages, High level synthesis, Space exploration, RTL abstraction, architectures, custom processors, design and test, hardware synthesis and verification, high-level synthesis}, journal = {IEEE design and test of computers}, doi = {10.1109/MDT.2009.69}, volume = {26}, number = {4}, issn = {0740-7475}, title = {An Introduction to High-Level Synthesis}, keyword = {high level synthesis, HLS techniques, abstraction level design, high-level synthesis, optimized RTL hardware, Application software, Assembly, Circuit simulation, Circuit synthesis, Computer architecture, Design methodology, Design optimization, Hardware design languages, High level synthesis, Space exploration, RTL abstraction, architectures, custom processors, design and test, hardware synthesis and verification, high-level synthesis} }
@article{article, author = {Coussy, Phillipe and Gajski, Daniel D. and Meredith, Michael and Takach, Andres}, year = {2009}, pages = {8-17}, DOI = {10.1109/MDT.2009.69}, keywords = {high level synthesis, HLS techniques, abstraction level design, high-level synthesis, optimized RTL hardware, Application software, Assembly, Circuit simulation, Circuit synthesis, Computer architecture, Design methodology, Design optimization, Hardware design languages, High level synthesis, Space exploration, RTL abstraction, architectures, custom processors, design and test, hardware synthesis and verification, high-level synthesis}, journal = {IEEE design and test of computers}, doi = {10.1109/MDT.2009.69}, volume = {26}, number = {4}, issn = {0740-7475}, title = {An Introduction to High-Level Synthesis}, keyword = {high level synthesis, HLS techniques, abstraction level design, high-level synthesis, optimized RTL hardware, Application software, Assembly, Circuit simulation, Circuit synthesis, Computer architecture, Design methodology, Design optimization, Hardware design languages, High level synthesis, Space exploration, RTL abstraction, architectures, custom processors, design and test, hardware synthesis and verification, high-level synthesis} }

Časopis indeksira:


  • Current Contents Connect (CCC)
  • Web of Science Core Collection (WoSCC)
    • Science Citation Index Expanded (SCI-EXP)
    • SCI-EXP, SSCI i/ili A&HCI
  • Scopus

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