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Pregled bibliografske jedinice broj: 633620

System-level synthesis: From specification to transaction level models

Gajski, Daniel D.
System-level synthesis: From specification to transaction level models // Proceedings of International Conference on Communications, Circuits and Systems, 2009. ICCCAS 2009.
Milpitas (CA): Institute of Electrical and Electronics Engineers (IEEE), 2009. str. 1134-1138 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)

CROSBI ID: 633620 Za ispravke kontaktirajte CROSBI podršku putem web obrasca

Naslov
System-level synthesis: From specification to transaction level models

Autori
Gajski, Daniel D.

Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni

Izvornik
Proceedings of International Conference on Communications, Circuits and Systems, 2009. ICCCAS 2009. / - Milpitas (CA) : Institute of Electrical and Electronics Engineers (IEEE), 2009, 1134-1138

ISBN
978-1-4244-4886-9

Skup
International Conference on Communications, Circuits and Systems, 2009. ICCCAS 2009.

Mjesto i datum
Milpitas (CA), Sjedinjene Američke Države, 23.07.2009. - 25.07.2009

Vrsta sudjelovanja
Predavanje

Vrsta recenzije
Međunarodna recenzija

Ključne riječi
circuit CAD; integrated circuit design; microprocessor chips; open systems; OSI network layers; automatic synthesis; circuit CAD; design complexities; model transformation; specification-transaction level models; system-level synthesis; CADCAM; Computer aided manufacturing; Electronic design automation and methodology; Embedded computing; Humans; Media Access Protocol; Network synthesis; Open systems; Productivity; Streaming media

Sažetak
With design complexities increasing daily, the multi-core community is entertaining the idea of increasing the level of abstraction to transaction-level modeling (TLM) and design. However, the proper definition, style or semantics of TLM is not clear. Nor is it clear how to synthesize or verify TLMs. In this paper, we will introduce several TLM models and define their semantics. This formalism will allow us to define design decisions and corresponding model transformations that can be used to transform one model into another. These transformations and refinements are the enabler for automatic synthesis and verification on TLM. We will also discuss the algorithms and flow for model transformation according to the OSI network layers and show how to build tools with inputs and outputs at transaction level. We will conclude with preliminary tools and results that promise a productivity gain of several orders of magnitude.

Izvorni jezik
Engleski

Znanstvena područja
Računarstvo



POVEZANOST RADA

Projekti:
036-0362980-1929 - Oblikovanje okolina za ugradene sustave (Sruk, Vlado, MZO ) ( CroRIS)

Ustanove:
Fakultet elektrotehnike i računarstva, Zagreb

Profili:

Avatar Url Daniel Gajski (autor)

Poveznice na cjeloviti tekst rada:

Pristup cjelovitom tekstu rada

Citiraj ovu publikaciju:

Gajski, Daniel D.
System-level synthesis: From specification to transaction level models // Proceedings of International Conference on Communications, Circuits and Systems, 2009. ICCCAS 2009.
Milpitas (CA): Institute of Electrical and Electronics Engineers (IEEE), 2009. str. 1134-1138 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)
Gajski, D. (2009) System-level synthesis: From specification to transaction level models. U: Proceedings of International Conference on Communications, Circuits and Systems, 2009. ICCCAS 2009..
@article{article, author = {Gajski, Daniel D.}, year = {2009}, pages = {1134-1138}, keywords = {circuit CAD, integrated circuit design, microprocessor chips, open systems, OSI network layers, automatic synthesis, circuit CAD, design complexities, model transformation, specification-transaction level models, system-level synthesis, CADCAM, Computer aided manufacturing, Electronic design automation and methodology, Embedded computing, Humans, Media Access Protocol, Network synthesis, Open systems, Productivity, Streaming media}, isbn = {978-1-4244-4886-9}, title = {System-level synthesis: From specification to transaction level models}, keyword = {circuit CAD, integrated circuit design, microprocessor chips, open systems, OSI network layers, automatic synthesis, circuit CAD, design complexities, model transformation, specification-transaction level models, system-level synthesis, CADCAM, Computer aided manufacturing, Electronic design automation and methodology, Embedded computing, Humans, Media Access Protocol, Network synthesis, Open systems, Productivity, Streaming media}, publisher = {Institute of Electrical and Electronics Engineers (IEEE)}, publisherplace = {Milpitas (CA), Sjedinjene Ameri\v{c}ke Dr\v{z}ave} }
@article{article, author = {Gajski, Daniel D.}, year = {2009}, pages = {1134-1138}, keywords = {circuit CAD, integrated circuit design, microprocessor chips, open systems, OSI network layers, automatic synthesis, circuit CAD, design complexities, model transformation, specification-transaction level models, system-level synthesis, CADCAM, Computer aided manufacturing, Electronic design automation and methodology, Embedded computing, Humans, Media Access Protocol, Network synthesis, Open systems, Productivity, Streaming media}, isbn = {978-1-4244-4886-9}, title = {System-level synthesis: From specification to transaction level models}, keyword = {circuit CAD, integrated circuit design, microprocessor chips, open systems, OSI network layers, automatic synthesis, circuit CAD, design complexities, model transformation, specification-transaction level models, system-level synthesis, CADCAM, Computer aided manufacturing, Electronic design automation and methodology, Embedded computing, Humans, Media Access Protocol, Network synthesis, Open systems, Productivity, Streaming media}, publisher = {Institute of Electrical and Electronics Engineers (IEEE)}, publisherplace = {Milpitas (CA), Sjedinjene Ameri\v{c}ke Dr\v{z}ave} }

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