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Pregled bibliografske jedinice broj: 428173

PLD modeling of all-digital DLL


Švedek, Tomislav; Matić, Tomislav; Herceg, Marijan
PLD modeling of all-digital DLL // Journal of electrical engineering, 60 (2009), 5; 246-254 (međunarodna recenzija, članak, znanstveni)


CROSBI ID: 428173 Za ispravke kontaktirajte CROSBI podršku putem web obrasca

Naslov
PLD modeling of all-digital DLL

Autori
Švedek, Tomislav ; Matić, Tomislav ; Herceg, Marijan

Izvornik
Journal of electrical engineering (1335-3632) 60 (2009), 5; 246-254

Vrsta, podvrsta i kategorija rada
Radovi u časopisima, članak, znanstveni

Ključne riječi
All-digital DLL; PLD Implementation; Digital-Controlled Delay Line

Sažetak
An all-digital delay-locked loop (DLL) suitable for implementation in the programmable logic device (PLD) is presented in this paper. Analog parts of the conventional DLL are realized by digital circuitry. Digital-controlled delay line (DCDL) is made of programmable digital-controlled delay elements (DCDE) based on the binary-weighted multiplex LCELL structures. Problems encountered in PLD implementation of the DLL are emphasized and discussed. Simulation and measuring results of the proposed DLL realized by ALTERA device EPM7128SLI10, are presented.

Izvorni jezik
Engleski

Znanstvena područja
Elektrotehnika, Računarstvo



POVEZANOST RADA


Projekti:
165-0361630-3049 - Napredni sustavi radijskog pristupa zatvorenom prostoru i interakcija s okolišem (Švedek, Tomislav, MZO ) ( CroRIS)
165-0362027-1479 - Širokopojasni pristup i internetske usluge u ruralnim područjima (Žagar, Drago, MZO ) ( CroRIS)
165-0362980-2002 - Postupci raspoređivanja u samoodrživim raspodijeljenim računalnim sustavima (Martinović, Goran, MZO ) ( CroRIS)

Ustanove:
Fakultet elektrotehnike, računarstva i informacijskih tehnologija Osijek

Profili:

Avatar Url Tomislav Matić (autor)

Avatar Url Tomislav Švedek (autor)

Avatar Url Marijan Herceg (autor)

Citiraj ovu publikaciju:

Švedek, Tomislav; Matić, Tomislav; Herceg, Marijan
PLD modeling of all-digital DLL // Journal of electrical engineering, 60 (2009), 5; 246-254 (međunarodna recenzija, članak, znanstveni)
Švedek, T., Matić, T. & Herceg, M. (2009) PLD modeling of all-digital DLL. Journal of electrical engineering, 60 (5), 246-254.
@article{article, author = {\v{S}vedek, Tomislav and Mati\'{c}, Tomislav and Herceg, Marijan}, year = {2009}, pages = {246-254}, keywords = {All-digital DLL, PLD Implementation, Digital-Controlled Delay Line}, journal = {Journal of electrical engineering}, volume = {60}, number = {5}, issn = {1335-3632}, title = {PLD modeling of all-digital DLL}, keyword = {All-digital DLL, PLD Implementation, Digital-Controlled Delay Line} }
@article{article, author = {\v{S}vedek, Tomislav and Mati\'{c}, Tomislav and Herceg, Marijan}, year = {2009}, pages = {246-254}, keywords = {All-digital DLL, PLD Implementation, Digital-Controlled Delay Line}, journal = {Journal of electrical engineering}, volume = {60}, number = {5}, issn = {1335-3632}, title = {PLD modeling of all-digital DLL}, keyword = {All-digital DLL, PLD Implementation, Digital-Controlled Delay Line} }

Časopis indeksira:


  • Web of Science Core Collection (WoSCC)
    • Science Citation Index Expanded (SCI-EXP)
    • SCI-EXP, SSCI i/ili A&HCI
  • Scopus


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