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Pregled bibliografske jedinice broj: 322015

Integration of Junction FETs in Back-wafer Contacted Silicon-On-Glass Technology


Jovanović, Vladimir; Shi, Lei; Lorito, Gianpaolo; Piccolo, Giulia; Sarubbi, Francesco; Nanver, Lis K.
Integration of Junction FETs in Back-wafer Contacted Silicon-On-Glass Technology // Proceedings of 10th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors, SAFE 2007
Veldhoven, Nizozemska, 2007. (poster, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)


CROSBI ID: 322015 Za ispravke kontaktirajte CROSBI podršku putem web obrasca

Naslov
Integration of Junction FETs in Back-wafer Contacted Silicon-On-Glass Technology

Autori
Jovanović, Vladimir ; Shi, Lei ; Lorito, Gianpaolo ; Piccolo, Giulia ; Sarubbi, Francesco ; Nanver, Lis K.

Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni

Izvornik
Proceedings of 10th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors, SAFE 2007 / - , 2007

Skup
10th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors, SAFE 2007

Mjesto i datum
Veldhoven, Nizozemska, 29.11.2007. - 30.11.2007

Vrsta sudjelovanja
Poster

Vrsta recenzije
Međunarodna recenzija

Ključne riječi
juction FET; back-wafer contacting; silicon-on-glass

Sažetak
Dual-gate junction field-effect transistors (JFETs) are integrated in a substrate transfer process called back-wafer contacted silicon-on- glass (SOG) technology. The silicon-on-BOX (buried-oxide) layer of an SOI wafer is transferred to glass and the JFET top- and bottom- gates are contacted on the top and bottom of this layer, respectively. For an efficient bottom-gate drive ultrashallow bottom-gate diodes are fabricated using either Schottky contacting or laser-annealing of shallow implants. Devices fabricated in silicon-on-BOX layers from 300 to 800 nm thick are investigated.

Izvorni jezik
Engleski

Znanstvena područja
Elektrotehnika



POVEZANOST RADA


Projekti:
036-0361566-1567 - Nanometarski elektronički elementi i sklopovske primjene (Suligoj, Tomislav, MZO ) ( CroRIS)
036-0982904-1642 - Sofisticirane poluvodičke strukture za komunikacijsku tehnologiju (Koričić, Marko, MZO ) ( CroRIS)

Ustanove:
Fakultet elektrotehnike i računarstva, Zagreb

Profili:

Avatar Url Vladimir Jovanović (autor)


Citiraj ovu publikaciju:

Jovanović, Vladimir; Shi, Lei; Lorito, Gianpaolo; Piccolo, Giulia; Sarubbi, Francesco; Nanver, Lis K.
Integration of Junction FETs in Back-wafer Contacted Silicon-On-Glass Technology // Proceedings of 10th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors, SAFE 2007
Veldhoven, Nizozemska, 2007. (poster, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)
Jovanović, V., Shi, L., Lorito, G., Piccolo, G., Sarubbi, F. & Nanver, L. (2007) Integration of Junction FETs in Back-wafer Contacted Silicon-On-Glass Technology. U: Proceedings of 10th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors, SAFE 2007.
@article{article, author = {Jovanovi\'{c}, Vladimir and Shi, Lei and Lorito, Gianpaolo and Piccolo, Giulia and Sarubbi, Francesco and Nanver, Lis K.}, year = {2007}, keywords = {juction FET, back-wafer contacting, silicon-on-glass}, title = {Integration of Junction FETs in Back-wafer Contacted Silicon-On-Glass Technology}, keyword = {juction FET, back-wafer contacting, silicon-on-glass}, publisherplace = {Veldhoven, Nizozemska} }
@article{article, author = {Jovanovi\'{c}, Vladimir and Shi, Lei and Lorito, Gianpaolo and Piccolo, Giulia and Sarubbi, Francesco and Nanver, Lis K.}, year = {2007}, keywords = {juction FET, back-wafer contacting, silicon-on-glass}, title = {Integration of Junction FETs in Back-wafer Contacted Silicon-On-Glass Technology}, keyword = {juction FET, back-wafer contacting, silicon-on-glass}, publisherplace = {Veldhoven, Nizozemska} }




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