Pregled bibliografske jedinice broj: 295544
Some Challenges in HDL Design Flow
Some Challenges in HDL Design Flow // MIPRO 2005 28th International Convention / Petar Biljanović, Karolj Skala (ur.).
Rijeka, 2005. str. 117-120 (poster, međunarodna recenzija, cjeloviti rad (in extenso), ostalo)
CROSBI ID: 295544 Za ispravke kontaktirajte CROSBI podršku putem web obrasca
Naslov
Some Challenges in HDL Design Flow
Autori
Sekso-Telento, Ivo ; Beroš, Slobodan Marko
Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), ostalo
Izvornik
MIPRO 2005 28th International Convention
/ Petar Biljanović, Karolj Skala - Rijeka, 2005, 117-120
ISBN
953-233-011-9
Skup
MIPRO 2005 28th International Convention
Mjesto i datum
Rijeka, Hrvatska, 30.05.2005. - 03.06.2005
Vrsta sudjelovanja
Poster
Vrsta recenzije
Međunarodna recenzija
Ključne riječi
HDL methodology; design; Verilog
Sažetak
This paper focuses on some questions that logic designers are confronting vhen using HDL-based design methodology. One of the recent options is a hoise of high-level behavioral design. The behavioral synthesis starts to emerge giving a boost to the high-level design but the RTL Approach still dominates. Although considered mature the RTL design can still present challenges, from coding style (Verilog examples) and use of synthesis, to the architectural solutions for performance, etc.
Izvorni jezik
Engleski
Znanstvena područja
Elektrotehnika
POVEZANOST RADA
Projekti:
0023029
Ustanove:
Fakultet elektrotehnike, strojarstva i brodogradnje, Split
