Pregled bibliografske jedinice broj: 249939
Interconnect Delay Time Estimation
Interconnect Delay Time Estimation // Proceedings of the 29th International Convention - MIPRO 2006 / Biljanović, Petar ; Skala, Karolj (ur.).
Rijeka: Hrvatska udruga za informacijsku i komunikacijsku tehnologiju, elektroniku i mikroelektroniku - MIPRO, 2006. str. 115-119 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)
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Naslov
Interconnect Delay Time Estimation
Autori
Šipić, Igor ; Branica, Ivan ; Kolar, Dalibor ; Divković Pukšec, Julijana
Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni
Izvornik
Proceedings of the 29th International Convention - MIPRO 2006
/ Biljanović, Petar ; Skala, Karolj - Rijeka : Hrvatska udruga za informacijsku i komunikacijsku tehnologiju, elektroniku i mikroelektroniku - MIPRO, 2006, 115-119
Skup
International Convention (29 ; MIPRO 2006)
Mjesto i datum
Opatija, Hrvatska, 22.05.2006. - 26.05.2006
Vrsta sudjelovanja
Predavanje
Vrsta recenzije
Međunarodna recenzija
Ključne riječi
integrated circuits; interconect delay; Elmore model; assymptotic waveform; evaluation moment; matching model; SPICE analysis
Sažetak
In a modern integrated circuits the delay time caused by gate and interconnects lines has great influence on circuit performance. In recent time interconnect has become parameter that can not be neglected. An adequate model for interconnect should be used together with an accurate and efficient model for delay time calculation. In this paper the interconnect wire has been modeled as a lump RC tree, with the various number of RC segments. Two models have been considered for delay time calculation, Elmore model and Asymptotic Waveform Evaluation (AWE) moment matching model. The obtained results have been compared with the SPICE analysis. It is shown that the AWE method that uses only few dominant poles is giving very good results.
Izvorni jezik
Engleski
Znanstvena područja
Elektrotehnika