Naslov
FAUST: Design and implementation of a pipelined RISC-V vector floating-point unit

Autori
Kovač, Mate ; Dragić, Leon ; Malnar, Branimir ; Minervini, Francesco ; Palomar, Oscar ; Rojas, Carlos ; Olivieri, Mauro ; Knezović, Josip ; Kovač, Mario

Izvornik
Microprocessors and Microsystems (0141-9331) 97 (2023); 104762, 7

Vrsta, podvrsta i kategorija rada
Radovi u časopisima, članak, znanstveni

Ključne riječi
FPU, vector processor, HPC, exascale computing, RISC-V

Sažetak
We present Faust, a pipelined FPU for vector processing-capable RISC-V core developed within the EPI project. Faust is based on the open-source multi-format floating-point architecture FPnew. Our design extends the support for the RISC-V Vector extension specification (RVV) 1.0 and the most recent IEEE754-2019 FP standard. Faust is extensively tested, mature and configurable enabling ease of integration, as will be demonstrated in the paper. We have also developed FPU-V, an update of the SoftFloat-based reference model as a critical part of the UVM-based universal and extensible FPU verification environment. Faust was integrated and taped out as part of Vitruvius, a RISC-V Vector Processing unit of the EPAC1.0, the first EPI Accelerator Test Chip in GlobalFoundries 22FDX technology.

Izvorni jezik
Engleski

Znanstvena područja
Računarstvo

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