Pregled bibliografske jedinice broj: 1051586
Bolt65 – performance-optimized HEVC HW/SW suite for Just-in-Time video processing
Bolt65 – performance-optimized HEVC HW/SW suite for Just-in-Time video processing // 42th International Convention on Information, Communication and Electronic Technology (MIPRO) - proceedings / Skala, Karolj (ur.).
Rijeka: Hrvatska udruga za informacijsku i komunikacijsku tehnologiju, elektroniku i mikroelektroniku - MIPRO, 2019. str. 966-970 doi:10.23919/mipro.2019.8756825 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)
CROSBI ID: 1051586 Za ispravke kontaktirajte CROSBI podršku putem web obrasca
Naslov
Bolt65 – performance-optimized HEVC HW/SW suite for Just-in-Time video processing
Autori
Piljić, Igor ; Dragić, Leon ; Duspara, Alen ; Čobrnić, Mate ; Mlinarić, Hrvoje ; Kovač, Mario
Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni
Izvornik
42th International Convention on Information, Communication and Electronic Technology (MIPRO) - proceedings
/ Skala, Karolj - Rijeka : Hrvatska udruga za informacijsku i komunikacijsku tehnologiju, elektroniku i mikroelektroniku - MIPRO, 2019, 966-970
Skup
42nd International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO 2019)
Mjesto i datum
Opatija, Hrvatska, 20.05.2019. - 24.05.2019
Vrsta sudjelovanja
Predavanje
Vrsta recenzije
Međunarodna recenzija
Ključne riječi
HEVC ; video codec ; Just-in-Time ; Bolt65 ; heterogeneous accelerator-based architectures
Sažetak
This paper presents Bolt65 HEVC software/hardware suite, consisting of encoder, decoder and transcoder, that is being developed at Faculty of electrical engineering and computing, University of Zagreb. One of the primary focus of Bolt65 is achieving Just- in-Time requirements that would enable video encoding/transcoding on demand. To achieve this goal, Bolt65 tries to maximally utilize all software and hardware components of the system on different architectures, from homogeneous CPU architectures with vector extensions to heterogeneous, accelerator-based architectures that have different types of processing cores. CPU-only implementation of Bolt65 was compared with referent HM HEVC software in three different encoding configurations: All Intra (AI), Low delay (LD) and Random Access (RA). Results show that Bolt65 achieves significant speed-up in all configurations and bitrate savings in AI and RA modes while sacrificing quality in order to achieve just-in-time requirements.
Izvorni jezik
Engleski
Znanstvena područja
Računarstvo
POVEZANOST RADA
Ustanove:
Fakultet elektrotehnike i računarstva, Zagreb
Citiraj ovu publikaciju:
Časopis indeksira:
- Web of Science Core Collection (WoSCC)
- Conference Proceedings Citation Index - Science (CPCI-S)
- Scopus