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Memory-aware multiobjective design space exploration of heteregeneous MPSoC (CROSBI ID 673507)

Prilog sa skupa u zborniku | izvorni znanstveni rad | međunarodna recenzija

Frid, N. ; Sruk, V. Memory-aware multiobjective design space exploration of heteregeneous MPSoC // 2018 41st International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO) / Skala, Karolj (ur.). Rijeka: Institute of Electrical and Electronics Engineers (IEEE), 2018. str. 861-866 doi: 10.23919/mipro.2018.8400159

Podaci o odgovornosti

Frid, N. ; Sruk, V.

engleski

Memory-aware multiobjective design space exploration of heteregeneous MPSoC

This paper discusses multiobjective exploration of heterogeneous MPSoC design space using a method based on NSGA-II evolutionary algorithm. Key feature of the proposed method is separation of computation and communication which enables exploration of mapping computation to processors and communication to memory elements. In this paper two approaches to mapping and scheduling are presented and compared: (1) single-phased, where tasks and communication channels are mapped to processor and memories simultaneously, and (2) two-phased, where mapping of tasks to processors is done in first phase, followed by mapping of communication channel to memories in the second phase.

genetic algorithms ; integrated circuit design ; microprocessor chips ; random-access storage ; system-on-chip ; communication channel ; memory-aware multiobjective design space exploration ; NSGA-II evolutionary algorithm ; heterogeneous MPSoC design ; Task analysis ; Program processors ; Resource management ; Communication channels ; Space exploration ; Processor scheduling ; Evolutionary computation ; design space exploration ; MPSoC ; evolutionary algorithm

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Podaci o prilogu

861-866.

2018.

objavljeno

10.23919/mipro.2018.8400159

Podaci o matičnoj publikaciji

2018 41st International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO)

Skala, Karolj

Rijeka: Institute of Electrical and Electronics Engineers (IEEE)

978-953-233-097-7

Podaci o skupu

MIPRO 2018

predavanje

21.05.2018-25.05.2018

Opatija, Hrvatska

Povezanost rada

Računarstvo

Poveznice