Design of High-speed and Flexible Controllers in Programmable Logic Devices (CROSBI ID 485759)
Prilog sa skupa u zborniku | izvorni znanstveni rad | međunarodna recenzija
Podaci o odgovornosti
Grbić, Alex ; Srbljić, Siniša ; Vranešić, Zvonko
engleski
Design of High-speed and Flexible Controllers in Programmable Logic Devices
Programmable logic devices, PLDs, continue to increase in terms of logic capacity and speed. Although logic capacity is less of an issue given the large devices on the market today, designers are still challenged with meeting timing and flexibility requirements for demanding applications. We demonstrate with an example, cache coherence controllers in the NUMAchine multiprocessor, an approach that can be used to implement a design with a demanding set of requirements using PLD technology. The approach consists of two parts. First, the circuits are functionally decomposed into simpler sub-circuits. The functional decomposition improves timing performance by reducing the number of functions with large fan-in and improves flexibility by confining changes to a particular subcircuit. Second, the CAD tools are guided in selecting devices and allocating resources. In the implementation, multiple devices were experimented with before the speed requirements were met. The resources were then allocated to increase the probability of accommodating future changes.
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Podaci o prilogu
2001.
objavljeno
Podaci o matičnoj publikaciji
Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering (CCECE 2001)
Toronto: IEEE Canada
Podaci o skupu
IEEE Canadian Conference on Electrical and Computer Engineering (CCECE 2001)
predavanje
13.05.2001-16.05.2001
Toronto, Kanada