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An Introduction to High-Level Synthesis (CROSBI ID 193769)

Prilog u časopisu | izvorni znanstveni rad | međunarodna recenzija

Coussy, Phillipe ; Gajski, Daniel D. ; Meredith, Michael ; Takach, Andres An Introduction to High-Level Synthesis // IEEE design & test of computers, 26 (2009), 4; 8-17. doi: 10.1109/MDT.2009.69

Podaci o odgovornosti

Coussy, Phillipe ; Gajski, Daniel D. ; Meredith, Michael ; Takach, Andres

engleski

An Introduction to High-Level Synthesis

High-level synthesis raises the design abstraction level and allows rapid generation of optimized RTL hardware for performance, area, and power requirements. This article gives an overview of state-of-the-art HLS techniques and tools.

high level synthesis; HLS techniques; abstraction level design; high-level synthesis; optimized RTL hardware; Application software; Assembly; Circuit simulation; Circuit synthesis; Computer architecture; Design methodology; Design optimization; Hardware design languages; High level synthesis; Space exploration; RTL abstraction; architectures; custom processors; design and test; hardware synthesis and verification; high-level synthesis

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Podaci o izdanju

26 (4)

2009.

8-17

objavljeno

0740-7475

10.1109/MDT.2009.69

Povezanost rada

Računarstvo

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