High-Voltage PMOS Transistor Model for Prediction of Susceptibility to Conducted Interference (CROSBI ID 174080)
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Podaci o odgovornosti
Jović, Ognjen ; Maier, C. ; Barić, Adrijan
engleski
High-Voltage PMOS Transistor Model for Prediction of Susceptibility to Conducted Interference
This paper presents a circuit-based high-voltage p-channel metal-oxide-semiconductor (HV-PMOS) transistor model that includes a vertical parasitic p-n-p bipolar transistor and a procedure for extraction of its model parameters. HV-PMOS transistors are subjected to conducted radio frequency (RF) interference at the source pin by using the direct power-injection method. The results reveal complex behavior when the power level of RF interference is varied. This behavior is caused by both nonlinear characteristics of the intrinsic MOS transistor and turn-on of the parasitic p-n-p bipolar transistor at higher RF power levels. The impact of strong conducted RF interference up to 20 dBm is modeled accurately in the frequency range from 1 MHz up to 1 GHz.
MOSFET ; electromagnetic compatibility ; radiofrequency interference ; semiconductor device models ; direct power injection (DPI) ; electromagnetic (EM) interference ; high-voltage p-channel metal–oxide-semiconductor (HV-PMOS) model
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Podaci o izdanju
53 (1)
2011.
53-62
objavljeno
0018-9375
10.1109/TEMC.2010.2076817