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Offset cancellation of CMOS inverter comparators


Matić, Tomislav; Švedek, Tomislav; Raguž, Krešimir
Offset cancellation of CMOS inverter comparators // Microelectronics, Electronics and Electronic Technologies + Hypermedia and Grid Systems MIPRO 2006 / Biljanović, Petar ; Skala, Karolj (ur.).
Rijeka: MIPRO, 2006. str. 125-128 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)


Naslov
Offset cancellation of CMOS inverter comparators

Autori
Matić, Tomislav ; Švedek, Tomislav ; Raguž, Krešimir

Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni

Izvornik
Microelectronics, Electronics and Electronic Technologies + Hypermedia and Grid Systems MIPRO 2006 / Biljanović, Petar ; Skala, Karolj - Rijeka : MIPRO, 2006, 125-128

Skup
MIPRO 2006

Mjesto i datum
Opatija, Hrvatska, 24.-26.05.2006

Vrsta sudjelovanja
Predavanje

Vrsta recenzije
Međunarodna recenzija

Ključne riječi
Offset cancellation; CMOS; inverter; comparator; amplifier

Sažetak
Comparators are main building blocks of the Nyquist rate and oversampled PCM ADCs and Sigma-Delta Modulation converters. There are three basic comparator architectures: high gain amplifier, charge balancing or data-sampling, and regenerative or latched comparators. The former is based on cascading of small gain CMOS inverter amplifier(s) (active load, current source or push-pull) and a high-speed latch. Transistor matching of a CMOS push-pull amplifier is subject to variation of the fabrication process and the threshold voltage of the comparator is not at the half of the power supply voltage. That results in the offset voltage. The paper analyzes CMOS inverter gain stages, and the auto-zeroing technique for offset cancellation.

Izvorni jezik
Engleski

Znanstvena područja
Elektrotehnika



POVEZANOST RADA


Projekt / tema
0165112

Ustanove
Fakultet elektrotehnike, računarstva i informacijskih tehnologija Osijek