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Pregled bibliografske jedinice broj: 118118

Generalized Parallel/Serial Test Procedure for Counters in Digital Low Complexity ASICs


Švedek, Tomislav; Švedek, Velimir
Generalized Parallel/Serial Test Procedure for Counters in Digital Low Complexity ASICs // Proceedings of the INES 2002 - IEEE 375 - 378 / Lovrenčić, Alen ; Rudas, J, Imre (ur.).
Opatija: Faculty of Organization and Informatics, University of Zagreb, Croatia, 2002. str. 375 - 378 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)


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Naslov
Generalized Parallel/Serial Test Procedure for Counters in Digital Low Complexity ASICs

Autori
Švedek, Tomislav ; Švedek, Velimir

Vrsta, podvrsta i kategorija rada
Radovi u zbornicima skupova, cjeloviti rad (in extenso), znanstveni

Izvornik
Proceedings of the INES 2002 - IEEE 375 - 378 / Lovrenčić, Alen ; Rudas, J, Imre - Opatija : Faculty of Organization and Informatics, University of Zagreb, Croatia, 2002, 375 - 378

Skup
IEEE International Conference on Intelligent Engineering Systems

Mjesto i datum
Opatija, Hrvatska, 26-28.052002

Vrsta sudjelovanja
Predavanje

Vrsta recenzije
Međunarodna recenzija

Ključne riječi
DFT; Parallel/Serial Procedure; ASIC; counter

Sažetak
This paper proposes a generalized Parallel/Serial Test Procedure for testing of all kinds of long counters embedded in the surrounding logic. Its advantages and drawbacks are discussed, and an example of 7-order of magnitude reduction of the test sequence is given.

Izvorni jezik
Engleski

Znanstvena područja
Elektrotehnika



POVEZANOST RADA


Projekti:
0165112 - Digitalna radiodifuzija u frekvencijskim opsezima ispod 30 MHz (Švedek, Tomislav, MZOS ) ( POIROT)

Ustanove:
Fakultet elektrotehnike, računarstva i informacijskih tehnologija Osijek

Profili:

Avatar Url Tomislav Švedek (autor)

Citiraj ovu publikaciju

Švedek, Tomislav; Švedek, Velimir
Generalized Parallel/Serial Test Procedure for Counters in Digital Low Complexity ASICs // Proceedings of the INES 2002 - IEEE 375 - 378 / Lovrenčić, Alen ; Rudas, J, Imre (ur.).
Opatija: Faculty of Organization and Informatics, University of Zagreb, Croatia, 2002. str. 375 - 378 (predavanje, međunarodna recenzija, cjeloviti rad (in extenso), znanstveni)
Švedek, T. & Švedek, V. (2002) Generalized Parallel/Serial Test Procedure for Counters in Digital Low Complexity ASICs. U: Lovrenčić, A. & Rudas, J, Imre (ur.)Proceedings of the INES 2002 - IEEE 375 - 378.
@article{article, year = {2002}, pages = {375 - 378}, keywords = {DFT, Parallel/Serial Procedure, ASIC, counter}, title = {Generalized Parallel/Serial Test Procedure for Counters in Digital Low Complexity ASICs}, keyword = {DFT, Parallel/Serial Procedure, ASIC, counter}, publisher = {Faculty of Organization and Informatics, University of Zagreb, Croatia}, publisherplace = {Opatija, Hrvatska} }




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