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Pregled bibliografske jedinice broj: 1059520

Performance engineering for HEVC transform and quantization kernel on GPUs


Čobrnić, Mate; Duspara, Alen; Dragić, Leon; Piljić, Igor; Kovač, Mario
Performance engineering for HEVC transform and quantization kernel on GPUs // Automatika : časopis za automatiku, mjerenje, elektroniku, računarstvo i komunikacije, 61 (2020), 3; 325-333 doi:10.1080/00051144.2020.1752046 (međunarodna recenzija, članak, znanstveni)


CROSBI ID: 1059520 Za ispravke kontaktirajte CROSBI podršku putem web obrasca

Naslov
Performance engineering for HEVC transform and quantization kernel on GPUs

Autori
Čobrnić, Mate ; Duspara, Alen ; Dragić, Leon ; Piljić, Igor ; Kovač, Mario

Izvornik
Automatika : časopis za automatiku, mjerenje, elektroniku, računarstvo i komunikacije (0005-1144) 61 (2020), 3; 325-333

Vrsta, podvrsta i kategorija rada
Radovi u časopisima, članak, znanstveni

Ključne riječi
Integer discrete cosine transform (DCT) ; High Efficiency Video Coding (HEVC) ; Graphics Processor Unit (GPU) ; Matrix multiplication ; Compute Unified Device Architecture (CUDA)
(integer discrete cosine transform (DCT) ; high efficiency video coding (HEVC) ; Graphics processor unit (GPU) ; matrix multiplication ; compute unified device architecture (CUDA))

Sažetak
Continuous growth of video traffic and video services, especially in the field of high resolution and high-quality video content, places heavy demands on video coding and its implementations. High Efficiency Video Coding (HEVC) standard doubles the compression efficiency of its predecessor H.264/AVC at the cost of high computational complexity. To address those computing issues high-performance video processing takes advantage of heterogeneous multiprocessor platforms. In this paper, we present a highly performance-optimized HEVC transform and quantization kernel with all-zero-block (AZB) identification designed for execution on a Graphics Processor Unit (GPU). Performance optimization strategy involved all three aspects of parallel design, exposing as much of the application’s intrinsic parallelism as possible, exploitation of high throughput memory and efficient instruction usage. It combines efficient mapping of transform blocks to thread-blocks and efficient vectorized access patterns to shared memory for all transform sizes supported in the standard. Two different GPUs of the same architecture were used to evaluate proposed implementation. Achieved processing times are 6.03 and 23.94 ms for DCI 4K and 8K Full Format, respectively. Speedup factors compared to CPU, cuBLAS and AVX2 implementations are up to 80, 19 and 4 times respectively. Proposed implementation outperforms previous work 1.22 times.

Izvorni jezik
Engleski

Znanstvena područja
Računarstvo



POVEZANOST RADA


Projekti:
EK-H2020-826647 - Inicijativa za Europski procesor (EPI SGA1) (Kovač, Mario, EK - H2020-SGA-LPMT-2018) ( POIROT)

Ustanove:
Fakultet elektrotehnike i računarstva, Zagreb

Profili:

Avatar Url Mario Kovač (autor)

Avatar Url Alen Duspara (autor)

Avatar Url Mate Čobrnić (autor)

Poveznice na cjeloviti tekst rada:

doi www.tandfonline.com hrcak.srce.hr

Citiraj ovu publikaciju:

Čobrnić, Mate; Duspara, Alen; Dragić, Leon; Piljić, Igor; Kovač, Mario
Performance engineering for HEVC transform and quantization kernel on GPUs // Automatika : časopis za automatiku, mjerenje, elektroniku, računarstvo i komunikacije, 61 (2020), 3; 325-333 doi:10.1080/00051144.2020.1752046 (međunarodna recenzija, članak, znanstveni)
Čobrnić, M., Duspara, A., Dragić, L., Piljić, I. & Kovač, M. (2020) Performance engineering for HEVC transform and quantization kernel on GPUs. Automatika : časopis za automatiku, mjerenje, elektroniku, računarstvo i komunikacije, 61 (3), 325-333 doi:10.1080/00051144.2020.1752046.
@article{article, year = {2020}, pages = {325-333}, DOI = {10.1080/00051144.2020.1752046}, keywords = {Integer discrete cosine transform (DCT), High Efficiency Video Coding (HEVC), Graphics Processor Unit (GPU), Matrix multiplication, Compute Unified Device Architecture (CUDA)}, journal = {Automatika : \v{c}asopis za automatiku, mjerenje, elektroniku, ra\v{c}unarstvo i komunikacije}, doi = {10.1080/00051144.2020.1752046}, volume = {61}, number = {3}, issn = {0005-1144}, title = {Performance engineering for HEVC transform and quantization kernel on GPUs}, keyword = {Integer discrete cosine transform (DCT), High Efficiency Video Coding (HEVC), Graphics Processor Unit (GPU), Matrix multiplication, Compute Unified Device Architecture (CUDA)} }
@article{article, year = {2020}, pages = {325-333}, DOI = {10.1080/00051144.2020.1752046}, keywords = {integer discrete cosine transform (DCT), high efficiency video coding (HEVC), Graphics processor unit (GPU), matrix multiplication, compute unified device architecture (CUDA)}, journal = {Automatika : \v{c}asopis za automatiku, mjerenje, elektroniku, ra\v{c}unarstvo i komunikacije}, doi = {10.1080/00051144.2020.1752046}, volume = {61}, number = {3}, issn = {0005-1144}, title = {Performance engineering for HEVC transform and quantization kernel on GPUs}, keyword = {integer discrete cosine transform (DCT), high efficiency video coding (HEVC), Graphics processor unit (GPU), matrix multiplication, compute unified device architecture (CUDA)} }

Časopis indeksira:


  • Web of Science Core Collection (WoSCC)
    • Science Citation Index Expanded (SCI-EXP)
    • SCI-EXP, SSCI i/ili A&HCI
  • Scopus


Citati:





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