engleski

Deep Learning Accelerator on Programmable Heterogeneous System with RISC-V Processor

This paper explores a heterogeneous, open source, RISC-V based platform, called PULP (Parallel Ultra-Low-PowerProcessing Platform) with customizable MAC (multiply and accumulate) accelerator for neural network acceleration on edge computing devices with low power and performance-limited resources. To address the performance and power constraints we propose binarized implementation of a neural network accelerator. We show that binarized implementation is faster than the fixed-point accelerated implementation, albeit with some loss in precision, but still applicable to most of the use cases in edge computing.

deep learning ; RISC-V ISA ; multilayer perceptron ; binarized neural networks ; FPGA ; accelerator ; heterogeneous architecture

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